Summary: Leakage Mechanisms in Half Dummy vs Full Dummy Analog Layout Designs
Full Dummy Layout:
Definition: Uses dummy (non-functional) devices on all sides of active devices to improve layout symmetry and reduce variability.
Leakage Mechanisms:
Substrate Leakage from proximity-induced coupling.
Gate-to-Substrate Leakage due to parasitic effects.
Body Effect from improper substrate connections affects nearby devices.
Coupling Leakage from voltage differences between dummies and actives.
Half Dummy Layout:
Definition: Adds dummy devices only partially (e.g., on one side), aiming to save layout area.
Leakage Mechanisms:
Reduced Symmetry leads to irregular parasitics and higher leakage.
Substrate Coupling becomes uneven, creating leakage paths.
Hot Carrier Effects are more likely due to sharp layout features.
Common Leakage Factors in Both:
Parasitic Capacitance, Subthreshold Leakage, and Gate Leakage can arise due to proximity, process scaling, and layout decisions.
Conclusion:
Full Dummy designs offer better control over leakage but may still suffer from coupling and substrate-related effects.
Half Dummy designs are more susceptible to leakage due to asymmetry and less control over parasitic behavior.
